The Speed Checker Kit for Highways is a simple kit based on 555 Timer IC, NAND gate inverter, Decade counter and 7 segment display to calculate the speed of vehicles , plying on the road.
The Speed Checker for Highways implemented here assumes that the maximum permissible speed for highways is either 40Kmph or 60Kmph as per the traffic rule. For 40kmph limit the time period is set for 9 seconds using preset VR1, while for 60kmph limit the time period is set for 6 seconds using preset VR2. Slide switch S1 is used to select the time period as per the speed limit i.e. either 40Kmph or 60Kmph. The junction of LDR1 and resistor R1 is coupled to pin2 of IC1. Normally, light from the laser keeps falling on the LDR sensor continuously and thus the LDR offers a low resistance and pin2 of IC1 is high.
Whenever light falling on the LDR is interrupted by any vehicle, the LDR resistance goes high and hence pin 2 of IC1 goes low to trigger the monostable. As a result, output pin3 goes high for the preset period, either 9 or 6 seconds, and LED1 glows to indicate it. Reset pin 4 is controlled by the output of NAND gate N3 at power-on or whenever reset switch S2 is pushed. For IC2, the monostable is triggered in the same way as IC1 when the vehicle intersects the laser beam incident on LDR2 to generate a small pulse for stopping the count and for use in the speed detection. LED2 glows for the duration for which pin 3 of IC2 is high.
The outputs of IC1 and IC2 are fed to input pins 2 and 1 of NAND gate N1, respectively. When the outputs of IC1 and IC2 go high simultaneously i.e. the vehicle has crossed the preset speed limit, output pin 3 of gate N1 goes low to trigger mono-stable timer IC3. The output of IC3 is used for driving piezoelectric buzzer PZ1, which alerts the operator of speed-limit violation.
Resistor R9 and capacitor C5 decide the time period for which the piezoelectric buzzer sounds. The output of IC1 triggers the bistable (IC4) through gate N2 at the leading edge of the count-start pulse. When pin2 of IC4 goes low, the high output at its pin 3 enables astable clock generator IC5. Since the count-stop pulse output of IC2 is connected to pin6 of IC4 via diode D1, it resets clock generator IC5. IC5 can also be reset via diode D2 at power-on as well as when reset switch S2 is pressed.